1. Field of the Invention
This invention relates generally to computer systems and more particularly to providing direct address mode bypassing an indirect interface to access registers in the computer system.
2. Description of the Related Art
A computer system includes a plurality of semiconductor chips serving different functions. These semiconductor devices typically contain a host interface to allow communication between the various semiconductor devices such as microcontroller, microprocessors, other peripheral devices, etc. Microcontrollers, such as display controllers, support an indirect addressing mode when communicating through a host interface. The indirect addressing mode requires a read/write enable signal, chip select signal, register select signal, and a data bus. An indirect addressing mode using an indirect interface provides many advantages over a direct addressing mode using a direct interface. Some of the advantages include use of fewer pins to communicate, resulting in a less complex printed circuit board (PCB) layout, minimal electromagnetic interference (EMI) and less power consumption. The advantages are, however, offset by some disadvantages, which include increased processing time due to formatting of the data on the host side, protocol preparation and increased access latency. This is due to the fact that the indirect interface communicates through a protocol, which typically requires two accesses to read from/write to a register location, 1) an index cycle and 2) a data cycle. The index cycle sets up an address pointer to the register to be accessed in the internal memory of a microcontroller, while the data cycle reads from or writes data to that specified register. In addition, accessing non-consecutive areas of memory requires additional index and data cycles to access the memory address register and the memory data register resulting in further decrease in the throughput.
As the semiconductor devices increase in complexity with new features and functionalities, the disadvantages are becoming more of a concern. For instance, in a mobile device, such as cell phone, a base processor is heavily burdened handling several functions of varying priorities including communication with semiconductor devices within the mobile device, using an indirect interface. In such devices, increased cycles to access memory results in increased processing time which directly relates to decreased efficiency, decreased response time and increased latency.
It is, therefore, advantageous to address interface efficiency due to indirect addressing so that the base processor may efficiently manage the communication between various components/modules with a potential loss of data or data corruption.